1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same and more particularly, to a structure of a MOS transistor having a metal silicide film formed on a source and a drain region and a method for manufacturing the MOS transistor.
2. Description of the Related Art
Miniaturization and high integration of a MOS transistor using a silicon substrate have been remarkably developed. Since the miniaturization makes a small contact hole through which a metal wiring layer and the source/drain region is connected, a contact resistance between them tends to increase. The miniaturization also makes the source/drain region shallow and thus a sheet resistance of each region increases. The increase in these resistances causes the current driving force of the MOS transistor to decrease and causes the speed thereof to decrease.
To solve the above-mentioned problem, it is well-know to form a metal silicide film on the source/drain region. A process of manufacturing a MOS transistor using the metal silicide is illustrated in FIGS. 1A through 1C.
For example, in an n-channel MOS transistor, gate oxide film 32 and polysilicon gate electrode 33 are formed on p-type silicon substrate 31. SiO.sub.2 film 34 is formed on the side wall of gate electrode 33 by CVD chemical Vapor Deposition SiO.sub.2 film, followed by reactive ion etching.
For example, arsenic (As) is ion-implanted into p-type silicon substrate 31 and then a thermal treatment is performed at 900.degree. C. for an hour to form n-type impurity diffusion layers, i.e., source and drain regions 35 and 36. Ti film 37 is deposited on the entire surface of the MOS transistor. (FIG. 1A)
Subsequently, a lamp annealing treatment is performed at 700.degree. C. for thirty seconds to convert Ti film 37 into TiSi.sub.2 film 38 on the source and the drain region and the gate electrode. TiSi.sub.2 film 38 is relatively thin and its thickness is about 300 to 700 .ANG.. If TiSi.sub.2 film 38 were to be to thick, unnecessary TiSi.sub.2 film could be formed on SiO.sub.2 film 34, resulting in a short circuit between the source/drain region and the gate electrode. The other reason is that TiSi.sub.2 film 38 needs to be much thinner than the source and the drain region. Unreacted Ti film 37 is then eliminated by an etching liquid containing hydrogen peroxide, and the lamp annealing treatment is performed again at about 900.degree. C., thereby sufficiently lowering the resistivity of TiSi.sub.2 film 38. (FIG. 1B).
BPSG film 39 containing a large quantity of boron and phosphorus is formed on the entire surface of the MOS transistor, and film 39 is fluidized at a high temperature of about 900.degree. C. and its surface is flattened. FIG. 1C)
In the foregoing method of manufacturing the n-channel MOS transistor, the TiSi.sub.2 film 38 agglomerates, and its surface becomes uneven during the thermal treatment performed at a temperature of around 900.degree. C. For this reason, some portions of the source/drain region between a PN junction and the TiSi.sub.2 film are thin. A leak is likely to occur in the junction during the operation of the transistor, and thus the characteristic of the transistor is degraded. Due to the contraction of the TiSi.sub.2 film, the distance (indicated by "L" in FIG. 1C) between the TiSi.sub.2 film and a channel region increases, inevitably increasing the parasitic resistance of the MOS transistor.
In a p-channel MOS transistor in which a source and a drain region are formed by diffusing boron (B), there occurs the following problem in addition to the above problem. In the thermal treatment step mentioned above, boron in a p.sup.+ diffusion layer serving as the source or the drain region is diffused into the TiSi.sub.2 film. Thus, the boron concentration at the interface between the TiSi.sub.2 film and the p.sup.+ diffusion layer is lowered and contact resistance is increased. Furthermore, the boron taken into the TiSi.sub.2 film is retreated when the TiSi.sub.2 film contracts, and the concentration of the boron within the distance L is lowered and the parasitic resistance is increased.
As mentioned above, the MOS transistor in which the metal silicide film or layer is formed on the source and the drain region has a drawback in that the metal silicide film is poor in heat resistance and it contracts in the step of reflowing the BPSG film, resulting in degradation of the reliability of the semiconductor device. Furthermore, the p-channel MOS transistor has a drawback in that the contact resistance at the interface between the TiSi.sub.2 layer and the p.sup.+ diffusion layer and the parasitic resistance are likely to increase and the current driving force is reduced, resulting in a decrease in the operation speed of the device.